1. Field of the Invention
The present invention relates to a power semiconductor device, and more specifically, to a power semiconductor device that uses an IGBT and a MOSFET operated in parallel as switching devices.
2. Description of the Background Art
Regarding a switching device such as an IGBT (insulated gate bipolar transistor), introducing a structure of connecting the IGBT and a MOSFET (MOS field effect transistor) in parallel has conventionally been considered with the intention of reducing switching loss.
As an example, Japanese Patent Application Laid-Open No. 4-354156 (1992) discloses in FIG. 5 a structure where the respective gates of an IGBT and a MOSFET connected in parallel are connected in common to a gate driving circuit, and the IGBT and the MOSFET are driven by the common gate driving circuit.
This structure takes advantage of a difference in threshold voltage between the IGBT and the MOSFET to reflect the turn-off characteristics of the MOSFET in transient characteristics at the time of its turn-off and accommodate the turn-off characteristics of the IGBT that generates large turn-off loss, thereby reducing switching loss.
In the aforementioned structure of Japanese Patent Application Laid-Open No. 4-354156, an ON threshold voltage for the IGBT is set higher than that of the MOSFET, so that a total current always flows in the MOSFET in a transient state at the time of switching. In response, the current rating of the MOSFET should be increased. However, this in turn makes it difficult to reduce the chip size of the MOSFET, making the size reduction of the entire device difficult.